FI Filip Hormot Modeling comparators using analog events in VerilogA Electrical circuits often requires handling of events shown at the circuit input. VerilogA provides a simple way to manage them.
FI Filip Hormot Designing a Schmitt Trigger In this post, we explore the theory, implementation, and simulation of a Schmitt Trigger in ihp-sg13g2 technology using IIC-OSIC_TOOLS
FI Filip Hormot Designing a deglitch filter in xschem What is a glitch? In this article, we'll design a simple circuit which can help in filtering unwanted signal transitions.
