The PCB Layout Decisions That Determine Whether Your Ethernet Port Passes EMC Testing

I’ve seen the same EMC failure pattern enough times to describe it precisely: a hardware team does everything right on paper — correct transformer spec, proper Bob Smith termination, right component values — but the board still fails radiated emissions at 30MHz. The post-mortem almost always reveals a layout problem.

PCB placement for network transformers is not just a space management exercise. The physical positions of the transformer, RJ45 connector, PHY chip, and associated components determine how well the circuit actually performs. Here’s what I’ve learned.

Start with the signal flow direction and work backwards

The signal path is: PHY → transformer → RJ45 → cable. Your physical layout should mirror this exactly, from board interior to board edge. The PHY sits inland; the transformer sits behind the RJ45; the RJ45 sits at the board edge. When the layout follows the signal flow, the trace lengths on both the primary and secondary sides stay minimal.

When the layout doesn’t follow this — a PHY in the corner, transformer across the board, RJ45 somewhere in between — you end up with long differential pair runs that pick up noise, the secondary-side cable coupling has more length to radiate, and the Bob Smith termination is harder to place correctly.

Secondary side first, primary side second

When placing the transformer, the priority is minimizing the distance between the transformer secondary and the RJ45 connector. The secondary side is the cable side — it’s the most EMC-sensitive. I target under 10mm of routing between transformer secondary pins and RJ45 signal pins.

The primary side (PHY to transformer) gets the remaining space. It’s less EMC-critical because it’s on the isolated side of the transformer, but it still needs controlled-impedance differential routing and reasonable trace length.

The isolation moat is not optional

The ground plane under the Ethernet section needs a “moat” — a split in the copper pour that separates the primary-side signal ground from the secondary-side chassis ground. The moat width should be at least 4mm (minimum clearance for 1500V) and the creepage along the surface must be at least 6.4mm.

The moat defines two regions:

• Primary side (PHY side): normal signal ground, connected to DGND
• Secondary side (cable side): chassis ground, connected to chassis copper and mounting points

The only intentional electrical connection between these two regions is through the Bob Smith capacitor. This is the star-ground point. Every other connection between primary and secondary ground is a layout error that undermines the isolation the transformer is designed to provide.

Bob Smith placement makes or breaks high-frequency performance

I treat the 75Ω resistors and 1000pF capacitor as physically inseparable from the transformer center tap pins. They should be within 2–5mm of the center tap pins. Trace inductance from long runs to the termination components is roughly 1nH/mm — at 300MHz, 10nH is 18Ω of series impedance, which significantly reduces the bypass effectiveness right where it’s needed most.

For Gigabit designs, all four center taps need termination. I number them explicitly in the schematic — CT1 through CT4 — so there’s no ambiguity about which ones are connected.

Keep the transformer away from switching noise

The worst thing I’ve seen is a transformer placed adjacent to a buck converter. Switching nodes have fast edges (dV/dt in the range of V/ns) that couple directly into transformer windings and the surrounding differential pair routing. Keep 5–10mm between the transformer and any switching node, and route switching regulator traces so they don’t run parallel to differential pairs.

The same applies to clock oscillators and high-speed digital buses. The Ethernet section should be treated as a quiet zone on the board.

CMC placement

If you’re adding a common mode choke, it goes between the transformer secondary and the RJ45 — not between the PHY and the transformer primary. Place it as close to the RJ45 as possible. Placing it on the primary side adds differential insertion loss to the PHY output without helping the cable radiation problem.

The layout that works every time

Board edge → RJ45 → CMC (if used) → Transformer → PHY

Chassis ground pour runs under the transformer and CMC. Isolation moat sits under the transformer body. Signal ground pour runs under the PHY. Bob Smith termination is adjacent to the transformer center tap pins on the secondary side.

For sourcing, Voohu Technology (www.voohuele.com) provides reference footprints and layout guidelines alongside their transformer products. 50pcs MOQ, DHL 3–5 days.