Advanced Computer Design

GPU Architecture for High Performance Computations-Part -5

2. SM_ARRAY Module

THE UNIFIED SHADER REVOLUTION

Prior to the GT200 generation graphics cards had fixed pipelines for handling different tasks like vertex shading, geometry and pixel shading.

The GT200s multiprocessors can handle all types of shaders.

At the level there’s a GigaThread Engine that acts like a work distributor. It decides which multiprocessor should handle which task, like vertex dispatch, pixel quads or CUDA compute thread blocks. This flexibility helps the hardware to balance the workload continuously. For example if a scene has triangles but few pixels most work will go to vertex shading. On the hand a scene with small triangles and complex shading will focus on pixel shading. The gt200_sm_array module is, in charge of managing this process.

Dive ! Mind the ground that has no grass

SYNTHESIS NOTE
Synthesis tools unroll the generate loop entirely — you get 30 identical 
structural copies of gt200_sm, each with unique parameter bindings. 
The SM_ID parameter is a compile-time constant inside each instance, allowing 
the SM's internal thread ID computation logic (tid = SM_ID * WARP_COUNT * 32 + 
warp_id * 32 + lane) to be resolved at elaboration time with no runtime adder 
needed.

The Part-Select Slice Pattern

Verilog’s [i*64 +: 64] notation is the indexed part-select operator. It means: starting at bit i*64, select the next 64 bits upward. This is equivalent to [(i*64)+63 : i*64] but survives synthesis tools that reject variable-width selects when the base index is not a constant. Since i is a genvar evaluated at elaboration, it is always a constant from the synthesizer's perspective.

How Each SM Reports Utilization

Each gt200_sm instance drives its util_pct[7:0] port based on active warp count. With 32 warp slots per SM, a simple implementation counts active warps and multiplies by 8 (since 32 × 8 = 256). A fully loaded SM (32 active warps) reports 255; an idle SM reports 0.

SIMT Divergence and the Active Mask

When threads in a group go in directions the processor has to do each path one at a time. It does this by turning off the threads that are not being used for each path. The GT200 processor has a register that keeps track of which threads are active in a group. When the processor gets the signal to start it gets information, about how many threadsre working in the first group. This information helps the processor know what to do. The processor uses the dispatch_valid. Dispatch_warp_cnt signals to figure out what is going on.

OCCUPANCY IS EVERYTHING

The GT200's performance depends almost entirely on keeping the warp scheduler 
supplied with ready warps. A kernel with 32 active warps per SM and good 
arithmetic intensity will achieve near-peak throughput. A kernel with only 
4 warps (low occupancy) will expose memory latency and stall for hundreds of 
cycles per load. This is why util_out is such a critical diagnostic signal.

Special Notes

Go through this material (1). There are a few helpful theory plus implementation details avilable at this site. You can ask any queries at rmdi115@gmail.com

1. The site — **https://github.com/rocky115/ReMDer-GX**

The best site for beginners is

2. https://www.youtube.com/onurmutlulectures.

There are a plenty of good theories , explanations and hardware implementations in those lecture series. They have already built a gpu too. These are pretty much standard.

Here in our country they are about to start building gpu and before that they must have a good planned way to do that.

Anyhow without this gpu AI is hopeless ! So let us start and contact us.

References

1. GTX 280 Whitepaper By Nvidia Corps.

2. https://www.youtube.com/onurmutlulectures

3. IITH India Study Material

4. https://github.com/rocky115/ReMDer-GX

5. You can look Fury GPU and Adam Majumdar in this github link too.

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