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The Fragile Foundation of AI: Five Monopolies Controlling the Global Chip Supply

Decoding the CoWoS and HBM bottlenecks rewiring tech infrastructure, market valuations and global policy risk.

Stratum Org · 2026-06-24 07:21 · 0 claps · 3.1 min read
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The Fragile Foundation of AI: Five Monopolies Controlling the Global Chip Supply

Decoding the CoWoS and HBM bottlenecks rewiring tech infrastructure, market valuations and global policy risk.

Stratum Organization Alok Hiriyur June 24, 2026 Semiconductors & AI

The AI chip supply chain runs through a very small number of companies. Each one holds a near-monopoly on one step of the process. Buyers, investors, and legislators face the same problem. Supply depends on choke points they do not control. Five steps: design, lithography equipment, wafer fabrication, advanced packaging, and high-bandwidth memory. NVIDIA leads chip design. ASML supplies the lithography machines. TSMC fabricates the wafers and packages the chips. SK Hynix, Samsung, and Micron make the memory.

Lithography

ASML holds roughly 90% or more of the high-end lithography market. The company is the sole maker of extreme ultraviolet (EUV) machines at commercial scale. No advanced AI chip can exist without EUV layers. ASML reported first-quarter 2026 sales of 8.8 billion euros at 53$ gross margin. A single next-generation High-NA machine carries a price near 400 million dollars. Only TSMC, Samsung, and Intel run EUV at scale today. The machines operate in Taiwan, South Korea, and the United States.

TSMC Wafers

TSMC dominates fabrication. The company reported first-quarter 2026 revenue of 35.9 billion dollars, up 40.6$ year over year, with gross margin at 66.2%. Apple, NVIDIA, AMD, and Qualcomm depend on TSMC for their most advanced chips. Even wafers fabricated at TSMC’s Phoenix, Arizona plant return to Taiwan for the final assembly step. Concentration in Taiwan creates a single choke-point for the global supply.

Packaging Constraints

Jukan (2025). UBS Raises CoWoS Demand Forecasts for NVIDIA and Broadcom, With Rubin and CPX as Key Growth Drivers UBS (T. Arcuri, Oct 8, 2025) https://t.co/hpDhkezpdG[Accessed 24 Jun. 2026].

Jukan (2025). UBS Raises CoWoS Demand Forecasts for NVIDIA and Broadcom, With Rubin and CPX as Key Growth Drivers UBS (T. Arcuri, Oct 8, 2025) https://t.co/hpDhkezpdG[Accessed 24 Jun. 2026].

Advanced packaging now sets the ceiling on AI chip output. TSMC’s CoWoS process bonds the logic die to the memory stacks beside it. No high-end accelerator ships without this step. TSMC scaled CoWoS capacity from about 35,000 wafers per month in late 2024 to roughly 75,000 by the end of 2025. The 2026 target reaches 125,000 to 130,000. Demand still exceeds supply. CEO C.C. Wei told shareholders on June 4, 2026, that CoWoS capacity stays sold out through 2026. Lead times run 52 to 78 weeks. NVIDIA reserves more than 60$ of CoWoS capacity for 2025 and 2026. TSMC outsources simpler steps to ASE and Amkor. Packaging prices rise at two to four times the rate of the wafers themselves.

Memory

High-bandwidth memory (HBM) gates GPU shipments. A Nvidia Blackwell B200 carries eight HBM stacks, and HBM accounts for more than half the chip’s bill of materials. Three companies supply nearly all HBM. SK Hynix leads with 50–62% market share. Samsung and Micron make up the rest. All three sold out their entire 2026 production capacity. SK Hynix supplies roughly 90$ of Nvidia’s HBM. The next generation, HBM4, entered production in 2026 at higher cost, near 500 dollars per stack.

Policy Risk

In December 2025, the US administration reversed its complete denial of Nvidia’s H200 chip for China. The Commerce Department shifted to case-by-case review in January 2026 with conditions: a volume cap at 50% of US domestic sales and a 25% tariff per shipment. A separate Senate bill seeks a 30-month ban on H200 and Blackwell exports to China. Rules change on an extremely short notice and market conditions change with each court ruling.

Practical steps

If your company or business needs these advanced AI chips, factor in these long lead times. Packaging lead times of 52 to 78 weeks mean orders placed today ship more than a year out. Plan everything around 18 months ahead. Track the actual constraint and production capacity reported, not whatever the news reports. The raw silicon supply is not the limit, its mostly the packaging and HBM (CoWoS and HBM allocation). Get multiple suppliers where possible. ASE and Amkor now handle the overflow packaging. Micron offers a US-based HBM source. If you have multiple sources, one can cover for another in the case of an emergency. Export rules change on a weekly basis. Make sure to test scenarios and simulations for China access at full, capped, and zero volume and how that will affect your business in particular. For investors, watch ASML, TSMC, and SK Hynix. They complete power because no substitute exists currently. Margin expansion in all these companies clearly demonstrates this stated power. TSMC’s 66.2% gross margin and ASML’s 53% show their monopoly positions.

Conclusion

The AI chip supply chain concentrates risk in a few companies across three countries. Each step relies on the one before. As stated before, anyone depending on AI hardware should plan around extremely long lead times, track the constraints in the market and prepare for policy changes.


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