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Imagine designing a car without ever testing whether the brakes work. No matter how good the design looks on paper, it is unsafe unless it…

Jul 11, 2026 · 4 min read · 0 claps #design-verification #functionalverification #verification

Verification used to look like this…

May 06, 2026 · 6 min read · 2 claps #uvm-training #vmu #system-verilog

// VLSI · Design Verification · UVM Series — Part 3

Mar 15, 2026 · 9 min read · 1 claps #vmu #vlsi #system-verilog

// VLSI · Design Verification · UVM Series — Part 2

Mar 11, 2026 · 10 min read · 0 claps #vmu #system-verilog #vlsi

HUM

In the early days of learning digital design, the verification workflow is deceptively simple. You write a module — say, an ALU or a…

Nov 21, 2025 · 8 min read · 0 claps #ic-design #cpu-design #design-verification

HUM

This semester at Rice University, students in MECE are required to have a capstone project with a professor. Last semester, I worked on…

Oct 08, 2025 · 7 min read · 101 claps #dv #design-verification #cpu-design

GEN LIF

In this article, we will delve into the inner workings of AXI4 burst transactions, specifically focusing on a scenario where an…

Nov 07, 2024 · 3 min read · 0 claps #axi4 #burst #verification